Intel 324632-003 Switch User Manual


 
Intel
®
82575EB Gigabit Ethernet Controller — Global Reset and General Configuration
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
30 January 2011
After the initialization completes, a typical driver enables the desired interrupts by writing to the IMS
and EIMS registers.
3.4 Global Reset and General Configuration
The 82575 initialization typically starts with a global reset that puts it into a known state and enables
the software device driver to continue the initialization sequence.
Several values in the Device Control Register (CTRL) need to be set upon power up or after an 82575
reset for normal operation.
FD should be set per interface negotiation (if done in software), or is set by the hardware if the
interface is Auto-Negotiating. This is reflected in the Device Status Register in the Auto-Negotiating
case.
Speed is determined via Auto-Negotiation or forced by software if the link is forced. Status
information for speed is also readable in STATUS.
In SerDes mode, CTRL.ILOS should be set to according to the polarity of the Sig_DET signal.
Set the packet buffer allocation for transmit receive flows in the PBA register. This should be done
before RCTL.RXEN & TCTL.TXEN are set. An ordered disabling of all queues and of the Rx and Tx flows
is required before any change in the packet buffer allocation is done.
If flow control is enabled, program the FCRTL, FCRTH, FCTTV and FCRTV registers.
3.5 Receive Initialization
Program the Receive address register(s) per the station address. This can come from the EEPROM or
from any other means (for example, on some systems, this comes from the system PROM not the
EEPROM on the adapter card)
Set up the MTA (Multicast Table Array) per software by zeroing all entries initially and adding in entries
as requested.
Program RCTL with appropriate values. If initializing it at this stage, it is best to leave the receive logic
disabled (EN = 0b) until after the receive descriptor ring has been initialized. If VLANs are not used,
software should clear VFE. Then there is no need to initialize the VFTA. Select the receive descriptor
type.
The following should be done once per receive queue:
Allocate a region of memory for the receive descriptor list.
Receive buffers of appropriate size should be allocated and pointers to these buffers should be
stored in the descriptor ring.
Program the descriptor base address with the address of the region.
Set the length register to the size of the descriptor ring.
Program PSRCTL of the queue according to the size of the buffers and the required header handling
If header split or header replication is required for this queue, program the PSRTYPE register
according to the required headers.