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Intel
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82575EB Gigabit Ethernet Controller — Flow Control Address Low - FCAL (00028h; R/W)
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
328 January 2011
Table 90. PCIe* Performance
14.3.13 Flow Control Address Low - FCAL (00028h; R/
W)
Flow control packets are defined by 802.3X to be either a unique multicast address or the station
address with the Ether Type field indicating PAUSE. The FCA registers provide the value hardware
compares incoming packets against to determine that it should PAUSE its output.
The FCAL register contains the lower bits of the internal 48-bit Flow Control Ethernet address. All 32
bits are valid. Software can access the High and Low registers as a register pair if it can perform a 64-
bit access to the PCIe* bus. This register should be programmed with 00_C2_80_01h. The complete
flow control multicast address is: 01_80_C2_00_00_01h; where 01h is the first byte on the wire, 80h is
the second, etc.
Note: Any packet matching the contents of {FCAH, FCAL, FCT} when CTRL.RFCE is set is acted on
by the 82575. Whether flow control packets are passed to the host (software) depends on
the state of the RCTL.DPF bit and whether the packet matches any of the normal filters
14.3.14 Flow Control Address High - FCAH (0002Ch; R/
W)
This register contains the upper bits of the 48-bit Flow Control Ethernet address. Only the lower 16 bits
of this register have meaning. The complete Flow Control address is {FCAH, FCAL}. This register should
be programmed with 01_00h. The complete flow control multicast address is: 01_80_C2_00_00_01h;
where 01h is the first byte on the wire, 80h is the second, etc.
ULT Lockout 11 Fuse
dependent
Indicates if the ULT information is valid.
CLS Lockout 12 Fuse
dependent
Indicates the class programming was done.
Reserved 31:13 00h Reserved.
Port Enabled Disabled
Single port x2 x1
Dual port x4 x2
Field Bit(s)
Initial
Value
Description
FCAL 31:0 X Flow Control Address Low
Should be programmed with 00_C2_80_01h
Field Bit(s)
Initial
Value
Description
FCAH 15:0 X Flow Control Address High
Should be programmed with 01_00h.
Reserved 31:16 0b Reserved
Reads as 0b.