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Flexible TCO Filter Table Registers - FTFT (09400h-097FCh; RW) — Intel
®
82575EB Gigabit
Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 399
Each 128-byte filter is composed of 32 Dword entries, where each two Dwords are accompanied by an
8-bit mask, one bit per filter byte. The bytes in each two Dwords are written in network order. For
example, byte0 written to bits [7:0], byte1 to bits [15:8] etc. The mask field is set so that bit0 in the
mask masks byte0, bit 1 masks byte 1 etc. A value of one in the mask field means that the appropriate
byte in the filter should be compared to the appropriate byte in the incoming packet.
Note: The mask field must be 8 bytes aligned even if the length field is not 8 bytes aligned as the
hardware implementation compares 8 bytes at a time so it should get extra masks until the
end of the next Qword. Any mask bit that is located after the length should be set to zero
indicating no comparison should be done.
In case the actual length, which is defined by the length field register and the mask bits, is
not 8 bytes aligned there might be a case that a packet which is shorter than the actual
required length pass the flexible filter. This can happen due to comparison of up to 7 bytes
that come after the packet but are not a real part of the packet.
The last Dword of each filter contains a length field defining the number of bytes from the beginning of
the packet compared by this filter. If actual packet length is less than the length specified by this field,
the filter fails. Otherwise, it depends on the result of actual byte comparison. The value should not be
greater than 128.
The initial values for the FTFT registers can be loaded from the EEPROM after power-up reset. The FTFT
registers are written by the BMC and not accessible to the host for writing. The registers are used to
filter manageability packets.
Reset - The FTFT registers are cleared on Internal_Power_On_Reset only.
…………..
31 8 31 8 7 0 31 0 31 0
Reserved Reserved Mask [7:0] Dword 1 Dword 0
Reserved Reserved Mask [15:8] Dword 3 Dword 2
Reserved Reserved Mask [23:16] Dword 5 Dword 4
Reserved Reserved Mask [31:24] Dword 7 Dword 6
31 8 31 8 7 0 31 0 31 0
Reserved Reserved Mask [127:120] Dword 29 Dword 28
Length Reserved Mask [127:120] Dword 31 Dword 30
Field Dword Address Bit(s) Initial Value
Filter 0 Dword0 0 09400h 31:0 X
Filter 0 Dword1 1 09404h 31:0 X
Filter 0 Mask[7:0] 2 09408h 7:0 X
Reserved 3 0940Ch X
Filter 0 Dword2 4 09410h 31:0 X
…
Filter 0 Dword30 60 094F0h 31:0 X
Filter 0 Dword31 61 094F4h 31:0 X
Filter 0 Mask[127:120] 62 094F8h 7:0 X
Length 63 094FCh 6:0 X