Filter
Top Products
Intel
®
82575EB Gigabit Ethernet Controller — Manageability MAC Address Low - MMAL (5910h +
8*n[n=0..3]; RW)
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
398 January 2011
14.7.8 Manageability MAC Address Low - MMAL (5910h
+ 8*n[n=0..3]; RW)
These registers contain the lower bits of the 48 bit Ethernet address. The MMAL registers are written by
the BMC and not accessible to the host for writing. The registers are used to filter manageability
packets.
Reset - The MMAL registers are cleared on Internal_Power_On_Reset only. The initial values for this
register can be loaded from the EEPROM by the management firmware after power-up reset.
The MMAL value should be configured to the register in host order.
14.7.9 Manageability MAC Address High - MMAH
(0x5914 + 8*n[n=0..3]; RW)
These registers contain the upper bits of the 48 bit Ethernet address. The complete address is {MMAH,
MMAL}. The MMAH registers are written by the BMC and not accessible to the host for writing. The
registers are used to filter manageability packets.
Reset - The MMAL registers are cleared on Internal_Power_On_Reset only. The initial values for this
register can be loaded from the EEPROM by the management firmware after power-up reset or
firmware reset.
The MMAH value should be configured to the register in host order.
14.7.10 Flexible TCO Filter Table Registers - FTFT
(09400h-097FCh; RW)
Each of the Four Flexible TCO Filters Table (FTFT) registers contains a 128-byte pattern and a
corresponding 128-bit mask array. If enabled, the first 128 bytes of the received packet are compared
against the non-masked bytes in the FTFT register.
Field Bit(s)
Initial
Value
Description
MMAL 31:0 X Manageability MAC Address Low
The lower 32 bits of the 48 bit Ethernet address.
Field Bit(s)
Initial
Value
Description
MMAH 15:0 X Manageability MAC Address High
The upper 16 bits of the 48 bit Ethernet address.
Reserved 31:16 00h Reserved
Reads as 00h. Ignored on writes.