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Copper/Fiber Switch — Intel
®
82575EB Gigabit Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 285
Software can then enable the OMED interrupt in ICR in order to get an indication on any detection of
energy in the non active connection.
The following procedure should be followed in order to enable the auto-sense mode:
• SerDes Detect Mode (PHY is active):
1. Set CONNSW.ENRGSRC to determine the sources for the signal detect indication (1b = external
SIG_DET, 0b = internal SerDes electrical idle). The default of this bit is set by the EEPROM.
2. Set CONNSW.AUTOSENSE_EN.
3. When signal is detected on the SerDes link, the 82575 sets the interrupt bit OMED in ICR and if
enabled, issue an interrupt. The CONNSW.AUTOSENSE_EN is cleared unless CONNSW.ASCLR_DIS
is set. In such a case the host driver is responsible for the clearing of the AUTOSENSE_EN bit.
• PHY Detect Mode:
1. Set CONNSW.AUTOSENSE_CONF = 1b.
2. Reset the PHY by assertion and de-assertion of CTRL.PHY_RST.
3. Wait until EEMNGCTL.CFG_DONE is set.
4. Enter the PHY to Link-Disconnect mode by setting PHY register 25 (bit 5) via MDIC register.
5. Set CONNSW.AUTOSENSE_EN = 1b and clear CONNSW.AUTOSENSE_CONF.
6. When signal is detected on the PHY link, the 82575 sets the interrupt bit OMED in ICR and if
enabled, issue an interrupt.
7. The 82575 puts the PHY in power down unless CONNSW.ASCLR_DIS is set. In such a case the host
driver is responsible for the clearing of the AUTOSENSE_EN bit.
According to the result of the interrupt, software can then decide to switch to the other core.
The following procedures needs to be followed to actually switch between the two modes:
• Internal PHY to SerDes Transition:
1. Disable Receiver by clearing RCTL.RXEN.
2. Disable Transmitter by clearing TCTL.EN.
3. Verify that the 82575 has stopped processing outstanding cycles and is idle.
4. Modify LINK mode to SerDes or SGMII by setting CTRL_EXT.LINK_MODE to 10b or 11b,
respectively.
5. Enable/Disable flow control values within the MAC.
6. Set up Tx and Rx queues and enable Tx and Rx processes.
• SerDes to Internal PHY Transition:
1. Disable Receiver by clearing RCTL.RXEN.
2. Disable Transmitter by clearing TCTL.EN.
3. Verify that the 82575 has stopped processing outstanding cycles and is idle.
4. Modify LINK mode to PHY mode by setting CTRL_EXT.LINK_MODE to 00b.
5. Set Link Up indication by setting CTRL.SLU.
6. Reset the PHY by setting CTRL.PHY_RST, waiting 10 ms and clearing CTRL.PHY_RST.
7. Set up PHY with desired auto-negotiation parameters.
8. Set up Tx and Rx queues and enable Tx and Rx processes.
The 82575's link mode is controlled by the Extended Device Control register: