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Alignment Error Count - ALGNERRC (04004h; RC) — Intel
®
82575EB Gigabit Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 417
14.9.2 Alignment Error Count - ALGNERRC (04004h;
RC)
Counts the number of receive packets with alignment errors (the packet is not an integer number of
bytes in length). In order for a packet to be counted in this register, it must pass address filtering and
must be 64 bytes or greater (from <Destination Address> through <CRC>, inclusively) in length. If
receives are not enabled, then this register does not increment. This register is valid only in MII mode
during 10/100 Mb/s operation.
14.9.3 Symbol Error Count - SYMERRS (04008h; RC)
Counts the number of symbol errors between reads. The count increases for every bad symbol
received, whether or not a packet is currently being received and whether or not the link is up. When
working in SerDes/SGMII mode these statistics can be read from the SCVPC register.
14.9.4 RX Error Count - RXERRC (0400Ch; RC)
Counts the number of packets received in which RX_ER was asserted by the PHY. In order for a packet
to be counted in this register, it must pass address filtering and must be 64 bytes or greater (from
<Destination Address> through <CRC>, inclusively) in length. If receives are not enabled, then this
register does not increment.
14.9.5 Missed Packets Count - MPC (04010h; RC)
Counts the number of missed packets. Packets are missed when the receive FIFO has insufficient space
to store the incoming packet. This can be caused because of too few buffers allocated, or because there
is insufficient bandwidth on the PCI bus. Events setting this counter cause RXO, the Receiver Overrun
Interrupt, to be set. This register does not increment if receives are not enabled.
These packets are also counted in the Total Packets Received register as well as in Total Octets
Received.
Field Bit(s)
Initial
Value
Description
AEC 31:0 0b Alignment error count
Field Bit(s)
Initial
Value
Description
SYMERRS 31:0 0b Symbol Error Count
Field Bit(s)
Initial
Value
Description
RXEC 31:0 0b RX error count
Field Bit(s)
Initial
Value
Description
MPC 31:0 0b Missed Packets Count