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Intel
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82575EB Gigabit Ethernet Controller — PCIe Power Management Wakeup
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
232 January 2011
• Sets the Magic Packet Received bit in the Wake Up Status Register (WUS).
• Sets the packet length in the Wake Up Packet Length Register (WUPL).
The 82575 maintains the first magic packet received in the Wake Up Packet Memory (WUPM) until the
software device driver writes a 1b to the Magic Packet Received MAG bit in the Wake Up Status Register
(WUS).
APM Wake Up is supported in all power states and only disabled if a subsequent EEPROM read results in
a cleared APM Wake Up bit or software explicitly writes a 0b to the APM Wake Up (APM) bit of the WUC
register.
7.5.2 PCIe Power Management Wakeup
• The 82575 supports PCIe* Power Management based wake ups. It can generate system wake-up
events from three sources:
• Reception of a Magic Packet.
• Reception of a network wake-up packet.
• Detection of a link change of state.
Activating PCIe* Power Management Wake Up requires the following steps:
• The driver programs the WUFC register indicating the wake-up packets. It also supplies the
necessary data to the IPv4 and IPv6 Address Table (IP4AT and IP6AT) and the Flexible Filter Mask
Table (FFMT), and the Flexible Filter Value Table (FFVT). It can also set the Link Status Change
(LNKC) bit in the Wake Up Filter Control Register (WUFC) to cause wake up when the link changes
state.
• At configuration time, the operating system writes a 1b to the PME_EN bit of the PMCSR.
After enabling wake up, the operating system typically writes 11b to the lower two bits of the PMCSR
placing the 82575 into low-power mode.
After wake up is enabled, the 82575 monitors the incoming packets. First, it filters the packets
according to its standard address filtering method and then filtering them with all of the enabled wake-
up filters. If a packet passes both the standard address filtering and at least one of the enabled wake-
up filters, the 82575:
• Sets the PME_Status bit in the PMCSR.
• If the PME_EN bit in the PMCSR is set, assert PE_WAKE_N or send a PM-PME message as defined in
the PCIe* specification.
• Stores the first 128 bytes of the packet in the Wake Up Packet Memory.
• Sets one or more of the received bits in the Wake Up Status Register (WUS). (The 82575 sets more
than one bit if a packet matches more than one filter.)
• Sets the packet length in the Wake Up Packet Length Register (WUPL).
If enabled, a link state change wake up causes similar results, setting PME_Status, asserting
PE_WAKE_N and setting the Link Status Changed (LNKC) bit in the Wake Up Status Register (WUS)
when the link goes up or down.
The 82575 supports the following change described in the PCIe* Base Specification, Rev. 1.1RD
(section 5.3.3.4): On receiving a PME_Turn_Off Message, the 82575 must block the transmission of
PM_PME Messages and transmit a PME_TO_Ack Message upstream. The 82575 is permitted to send a
PM_PME Message after the Link is returned to an L0 state through LDn.