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Power Management — Intel
®
82575EB Gigabit Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 215
7.0 Power Management
The 82575 supports the Advanced Configuration and Power Interface (ACPI) Specification as well as
Advanced Power Management (APM). This section describes how power management is implemented in
82575.
Implementation requirements were obtained from the following documents:
• PCI Bus Power Management Interface Specification - Revision 1.1
• PCI Express* Base Specification - Revision 1.0a
• ACPI Specification - Revision 2.0
• PCI Express* Card Electromechanical Specification - Revision 1.0
• Mobile PCIe* Communications Specification - Revision 0.80KD
Note: Power management can be disabled through bits in the Initialization Control Word, which is
loaded from the EEPROM during power-up reset. Even when disabled, the power
management register set is still present. Power management support is required by the
PCIe* Specification.
The following assumptions apply to the implementation of power management for the 82575:
• The driver sets the filters up prior to the system transitioning the 82575 to the D3 state.
• Before a transition from D0 to the D3 state, the operating system ensures the device driver has
been disabled.
• No wake-up capability, except APM wakeup if it is enabled in the EEPROM, is required after the
system puts the 82575 into the D3 state and then returns it to D0.
• If the APMPME bit in the Wake Up Control Register (WUC.APMPME) is 1b, it is permissible to assert
GIO_WAKE_N even when PME_En is 0b.
The 82575 power is delivered through external voltage regulators. Refer to the 82575 Design Guide for
external power delivery system requirements.
7.1 Power States
The 82575 supports D0 and D3 power states defined in the PCI Power Management and PCIe*
Specifications. D0 is divided into two sub-states: D0u and D0a. In addition, it supports a Dr state that
is entered when the power good signal is de-asserted (including the D3cold state).
Figure 23 shows the power states and transitions between them.