Intel 324632-003 Switch User Manual


 
Redirection Table - RETA (05C00h + 4*n [n=0..31]; R/W) — Intel
®
82575EB Gigabit Ethernet
Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 383
14.5.6 Redirection Table - RETA (05C00h + 4*n
[n=0..31]; R/W)
The redirection table is a 128-entry table with each entry being eight bits wide. Only seven bits of each
entry are used to store the tag value (five bits for the CPU index and two bits for queue index). The
table is configured through the following R/W registers.
. . .
Each entry (byte) of the indirection table contains the following information.
Bits 7:6 - Queue index pool 1 or regular RSS.
Bits 5:4 - Reserved
Bits 3:2 - Queue index pool 0 (relevant only if MRQC.MRQE = 101b or 110b)
Bits 1:0 - Reserved
The contents of the indirection table are not defined following reset of the Memory Configuration
registers. System software must initialize the table prior to enabling multiple receive queues. It might
also update the indirection table during run time. Such updates of the table are not synchronized with
the arrival time of received packets. Therefore, it is not guaranteed that a table update takes effect on
a specific packet boundary.
Note: If the operating system provides an indirection table whose size is smaller than 128 bytes,
software usually replicates the operating system-provided indirection table to span the
whole 128 bytes of the hardware's indirection table
DW 31 24 23 16 15 8 7 0
0 Tag 3 Tag 2 Tag 1 Tag 0
1 . . . . . .
DW 31 24 23 16 15 8 7 0
30
31 Tag 127 ... ... ...
Field Bit(s)
Initial
Value
Description
Entry 0 7:0 X Determines the tag value and physical queue for index 4*n + 0 (n=0..31).
Entry 1 15:8 X Determines the tag value and physical queue for index 4*n + 1 (n=0..31).
Entry 2 23:16 X Determines the tag value and physical queue for index 4*n + 2 (n=0..31).
Entry 3 31:24 X Determines the tag value and physical queue for index 4*n + 3 (n=0..31).
7:6 5:4 3:2 1:0
Queue index pool 1
(default)
Reserved Queue index pool 0 Reserved