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Manageability Registers — Intel
®
82575EB Gigabit Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 391
All reserved fields read as 0's and ignore writes.
Note: Before writing to the flexible filter length table the software device driver must first disable
the flexible filters by writing 0's to the Flexible Filter Enable bits of the Wake Up Filter
Control (WUFC.FLXn) register.
Flexible filter cannot operate with a 1-byte pattern. Filters operate properly with all other
allowed pattern length (2-7FFh).
14.7 Manageability Registers
All management registers are controlled by the BMC for both read and write. Host accesses to the
management registers are blocked (read and write) unless debug write is enabled. The attributes for
the fields in this section refer to the BMC access rights.
14.7.1 Management VLAN TAG Value - MAVTV (5010h
+4*n [n=0..7]; R/W)
Where “n” is the VLAN filter serial number, equal to 0,1,…7.
The MAVTV registers are written by the BMC and are not accessible to the host for writing. The registers
are used to filter manageability packets as described in the Intel® 82575 GbE Controller System
Manageability Interface Application Note.
31 0 31 11 10 0
Reserved Reserved Reserved Length 0
Reserved Reserved Length 1
Reserved Reserved Length 2
Reserved Reserved Length 3
Field Bits
Initial
Value
Description
LEN 10:0 0b Minimum length for flexible filter i (i=0..3)
Reserved 11:31 0b Reserved
Field Bits
Initial
Value
Description
VID 11:0 00h Contains the VLAN ID that should be compared with the incoming
packet if the corresponding bit in MFVAL.VLAN is set.
Rsv 31:12 00h Reserved.