Filter
Top Products
Intel
®
82575EB Gigabit Ethernet Controller — Content
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
6 January 2011
4.6.1.4 SMBus Slave Addresses - (0ffset 03h).............................................................................. 81
4.6.1.5 SMBus Fail-Over Register (Low Word) - (0ffset 04h) .......................................................... 83
4.6.1.6 SMBus Fail-Over Register (High Word) - (0ffset 05h) ......................................................... 83
4.6.1.7 NC-SI Configuration (0ffset 06h)..................................................................................... 83
4.6.2 Flex TCO Filter Configuration Structure................................................................................... 83
4.6.2.1 Section Header - (0ffset 0h) ........................................................................................... 83
4.6.2.2 Flex Filter Length and Control - (0ffset 01h) ..................................................................... 85
4.6.2.3 Flex Filter Enable Mask - (0ffset 02 - 09h) ........................................................................ 85
4.6.2.4 Flex Filter Data - (0ffset 0Ah - Block Length) .................................................................... 85
4.6.3 NC-SI Microcode Download Structure ..................................................................................... 85
4.6.3.1 Data Patch Size (Offset 0h) ............................................................................................ 85
4.6.3.2 Rx and Tx Code Size (Offset 1h) ..................................................................................... 85
4.6.3.3 Download Data (Offset 2h - Data Size)............................................................................. 85
4.6.4 NC-SI Configuration Structure............................................................................................... 86
4.6.4.1 Section Header - (0ffset 0h) ........................................................................................... 86
4.6.4.2 Rx Mode Control1 (RR_CTRL[15:0]) (Offset 01h)............................................................... 86
4.6.4.3 Rx Mode Control2 (RR_CTRL[31:16]) (Offset 02h)............................................................. 86
4.6.4.4 Tx Mode Control1 (RT_CTRL[15:0]) (Offset 03h) .............................................................. 86
4.6.4.5 Tx Mode Control2 (RT_CTRL[31:16]) (Offset 04h) ............................................................. 87
4.6.4.6 MAC Tx Control Reg1 (TxCntrlReg1 (15:0]) (Offset 05h) .................................................... 87
4.6.4.7 MAC Tx Control Reg2 (TxCntrlReg1 (31:16]) (Offset 06h) .................................................. 87
4.6.5 Common Firmware Pointer ................................................................................................... 87
4.6.5.1 Manageability Capability/Manageability Enable (Word 54h) ................................................. 88
4.6.6 Pass Through Pointers.......................................................................................................... 88
4.6.6.1 PT LAN0 Configuration Pointer (Word 56h) ....................................................................... 88
4.6.6.2 SMBus Configuration Pointer (Word 57h).......................................................................... 88
4.6.6.3 Flex TCO Filter Configuration Pointer (Word 58h)............................................................... 88
4.6.6.4 PT LAN1 Configuration Pointer (Word 59h) ....................................................................... 90
4.6.6.5 NC-SI Microcode Download Pointer (Word 5Ah)................................................................. 90
4.6.6.6 NC-SI Configuration Pointer (Word 5Bh)........................................................................... 90
4.6.7 PT LAN Configuration Structure .............................................................................................90
4.6.7.1 Section Header (Offset 0h)............................................................................................. 90
4.6.7.2 LAN0 IPv4 Address 0 LSB, MIPAF0 (Offset 01h)................................................................. 90
4.6.7.3 LAN0 IPv4 Address 0 LSB, MIPAF0 (Offset 02h)................................................................. 90
4.6.7.4 LAN0 IPv4 Address 1; MIPAF1 (Offset 03h:04h) ................................................................ 90
4.6.7.5 LAN0 IPv4 Address 2; MIPAF2 (Offset 05h:06h) ................................................................ 91
4.6.7.6 LAN0 IPv4 Address 3; MIPAF3 (Offset 07h:08h) ................................................................ 91
4.6.7.7 LAN0 MAC Address 0 LSB, MMAL0 (Offset 09h) ................................................................. 91
4.6.7.8 LAN0 MAC Address 0 LSB, MMAL0 (Offset 0Ah) ................................................................. 91
4.6.7.9 LAN0 MAC Address 0 MSB, MMAH0 (Offset 0Bh)................................................................ 91
4.6.7.10 LAN0 MAC Address 1; MMAL/H1 (Offset 0Ch:0Eh) ............................................................. 91
4.6.7.11 LAN0 MAC Address 2; MMAL/H2 (Offset 0Fh:11h).............................................................. 91
4.6.7.12 LAN0 MAC Address 3; MMAL/H3 (Offset 12h:14h) ............................................................. 91
4.6.7.13 LAN0 UDP Flex Filter Ports 0:15; MFUTP Registers (Offset 15h:24h)..................................... 92
4.6.7.14 LAN0 VLAN Filter 0:7; MAVTV Registers (Offset 25h:2Ch)................................................... 92
4.6.7.15 LAN0 Manageability Filters Valid; MFVAL LSB (Offset 2Dh).................................................. 92
4.6.7.16 LAN0 Manageability Filters Valid; MFVAL MSB (Offset 2Eh) ................................................. 92
4.6.7.17 LAN0 MAC Value MSB (Offset 2Fh) .................................................................................. 93
4.6.7.18 LAN0 MANC Value LSB (Offset 30h) ................................................................................. 93
4.6.7.19 LAN0 Receive Enable 1(Offset 31h) ................................................................................. 93
4.6.7.20 LAN0 Receive Enable 2 (Offset 32h) ................................................................................ 93
4.6.7.21 LAN0 MANC2H Value LSB (Offset 33h) ............................................................................. 95
4.6.7.22 LAN0 MANC2H Value MSB (Offset 34h) ............................................................................ 95
4.6.7.23 Manageability Decision Filters; MDEF0,1 (Offset 35h)......................................................... 95
4.6.7.24 Manageability Decision Filters; MDEF0, 2 (Offset 36h)........................................................ 96
4.6.7.25 Manageability Decision Filters; MDEF1:6, 1:2 (Offset 37h:42h) ........................................... 96
4.6.7.26 ARP Response IPv4 Address 0 LSB (Offset 43h) ................................................................ 97
4.6.7.27 ARP Response IPv4 Address 0 MSB (Offset 44h)................................................................ 97
4.6.7.28 LAN0 IPv6 Address 0 LSB; MIPAF (Offset 45h) .................................................................. 97
4.6.7.29 LAN0 IPv6 Address 0 MSB; MIPAF (Offset 46h) ................................................................. 97