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82575EB Gigabit Ethernet Controller — Activating the Protection Mechanism
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
46 January 2011
sequence, the 82575 reads the hardware initialization words in the EEPROM. If the signature in word
12h does not equal 01b the EEPROM is assumed as non-programmed. There are two effects for non-
valid signature:
• The 82575 stops reading EEPROM data and sets the relevant registers to default values.
• The 82575 enables access to any location in the EEPROM via the EEPROM CSR registers.
4.1.6 Activating the Protection Mechanism
Following an 82575 initialization, it reads the EEPROM. It then turns on the protection mechanism if
word 12h [15:14] contains a valid signature (equals 01b) and bit 4 in word 12h is set (enable
protection). Once the protection mechanism is turned on, words 12h, 2Ch, and 2Dh become write-
protected and the area that is defined by word 12h becomes hidden (for example, read/write
protected) and the area defined by word 2Ch and 2Dh becomes write protected.
Note: No matter what the read only protected area is, words 30h:3Fh (used by the PXE driver)
are writeable unless defined as hidden.
4.1.7 Non Permitted Accesses to Protected Areas in
the EEPROM
This section refers to EEPROM accesses via the EEC (bit banging) or EERD (parallel read access)
registers. Following a write access to the write protected areas in the EEPROM, the hardware responds
properly on the PCIe* bus, but does not initiate any access to the EEPROM. Following a read access to
the hidden area in the EEPROM (as defined by word 12h), the hardware does not access the EEPROM
and returns meaningless data to the host.
Note: Using bit banging, the SPI EEPROM can be accessed in a burst mode. For example,
providing an opcode address and then reading or writing data for multiple bytes. The
hardware inhibits an attempt to access the protected EEPROM locations even in burst
accesses.
Software should not access the EEPROM in a Burst Write mode starting in a non protected area and
continue to a protected one. In such a case, it is not guaranteed that the write access to any area ever
takes place.
4.1.8 EEPROM-Less Support
The 82575 loads information from the EEPROM non-volatile memory storage into the device registers
during the power-up sequence. If an EEPROM is not present, either by design or by fault, some of the
device registers might not be tuned for normal operation. It is required that the following script be run
immediately after an 82575 reset and before normal operation if an EEPROM is not detected.
Note: These actions are presented without comment because most of the settings involved are
not customer tunable. They must be performed in order, and the loader function is included
as follows. The example code is designed to be extensible to include other hardware
families.
Definitions:
u32 is unsigned 32 bit value,