Intel 324632-003 Switch User Manual


 
Intel
®
82575EB Gigabit Ethernet Controller — Transmit Descriptor Ring Structure
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
144 January 2011
5.6.8.5 STA
Table 45. STA Layout
5.6.8.6 IDX
Index into the hardware context table to indicate which context should be used for this request. If no
offload is required, this field is not relevant and no context needs to be initiated before the packet is
sent.
5.6.8.7 POPTS
Table 46. POPTS Layout
5.6.8.8 PAYLEN
The length (in bytes) of the large send payload or single send full Ethernet packet. PAYLEN indicates the
size of the data to be read from the host, which means the raw data length without markers, CRC, and
padding. In the case of a single send packet, PAYLEN should not include the parts of the packet added
by hardware such as CRC, VLAN tag, or padding.
Note: PAYLEN is ignored if TSE is not set.
When a packet spreads over multiple descriptors, all the descriptor fields are only valid in
the 1st descriptor of the packet, except for RS, which is always checked, and EOP, which is
always set at last descriptor of the series.
5.7 Transmit Descriptor Ring Structure
The transmit descriptor ring structure is shown in Figure 6. A pair of hardware registers maintains the
transmit queue. New descriptors are added to the ring by writing descriptors into the circular buffer
memory region and moving the ring’s tail pointer. The tail pointer points one entry beyond the last
hardware owned descriptor (but at a point still within the descriptor ring). Transmission continues up to
the descriptor where head equals tail at which point the queue is empty.
Field Description
Reserved (bits 3:1) Reserved.
DD (bit 0) Descriptor Done.
Field Description
Reserved (bits 5:2) Reserved.
TXSM (bit 1) Insert TCP/UDP Checksum
When set to 1b, TCP / UDP checksum is inserted. In this case, TUCMD.L4T indicates whether the
checksum is TCP or UDP. When TUCMD.TSE is set, TXSM must be set to 1b.
If this bit is set, the packet should at least contain a TCP header.
IXSM (bit 1) Insert IP Checksum
When set to 1b, indicates that IP Checksum is inserted. In IPv6 mode, it must be reset to 0b.
If the TUCMD.TSE bit is set and TUCMD.IPV4 is set, IXSM must be set to 1b as well.
If this bit is set, the packet should at least contain an IP header.