Renesas HD6417641 Network Card User Manual


  Open as PDF
of 1036
 
Section 2 CPU
Rev. 4.00 Sep. 14, 2005 Page 86 of 982
REJ09B0023-0400
Table 2.27 Single Data Transfer Instructions
Instruction
Instruction Code
Operation
Execution
States
DC
MOVS.W @-As,Ds 111101AADDDD0000 As – 2 As, (As)
MSW of Ds, 0 LSW of Ds
1
MOVS.W @As,Ds 111101AADDDD0100 (As) MSW of Ds,
0 LSW of Ds
1
MOVS.W @As+,Ds 111101AADDDD1000 (As) MSW of Ds,
0 LSW of Ds, As + 2 As
1
MOVS.W @As+Is,Ds 111101AADDDD1100 (Asc) MSW of Ds,
0 LSW of Ds, As + Is As
1
MOVS.W Ds,@-As* 111101AADDDD0001 As – 2 As,
MSW of Ds (As)
1
MOVS.W Ds,@As* 111101AADDDD0101 MSW of Ds (As) 1
MOVS.W Ds,@As+* 111101AADDDD1001 MSW of Ds (As),
As + 2 As
1
MOVS.W Ds,@As+Is* 111101AADDDD1101 MSW of Ds (As),
As + Is As
1
MOVS.L @-As,Ds 111101AADDDD0010 As – 4 As, (As) Ds 1
MOVS.L @As,Ds 111101AADDDD0110 (As) Ds 1
MOVS.L @As+,Ds 111101AADDDD1010 (As) Ds, As + 4 As 1
MOVS.L @As+Is,Ds 111101AADDDD1110 (As) Ds, As + Is As 1
MOVS.L Ds,@-As 111101AADDDD0011 As – 4 As, Ds (As) 1
MOVS.L Ds,@As 111101AADDDD0111 Ds (As) 1
MOVS.L Ds,@As+ 111101AADDDD1011 Ds (As), As + 4 As 1
MOVS.L Ds,@As+Is 111101AADDDD1111 Ds (As), As + Is As 1
Note: * If guard bit registers A0G and A1G are specified in source operand Ds, the data is
output to the LDB[7:0] bus and the sign bit is copied into the upper bits, [31:8].