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Section 2 CPU
Rev. 4.00 Sep. 14, 2005 Page 87 of 982
REJ09B0023-0400
The correspondence between DSP data transfer operands and registers is shown in table 2.28.
CPU core registers are used as a pointer address that indicates a memory address.
Table 2.28 Correspondence between DSP Data Transfer Operands and Registers
Register Ax Ix Dx Ay Iy Dy Da As Ds
R0
CPU
registers
R1
R2 (As2) Yes
R3 (As3) Yes
R4 (Ax0) Yes — Yes
R5 (Ax1) Yes — Yes
R6 (Ay0) Yes
R7 (Ay1) Yes
R8 (Ix) Yes
R9 (Iy) — Yes
A0 — Yes Yes DSP
registers
A1 — Yes Yes
M0 — — Yes
M1 — — Yes
X0 Yes Yes
X1 Yes Yes
Y0 Yes Yes
Y1 Yes Yes
A0G Yes
A1G Yes