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Section 18 Multi-Function Timer Pulse Unit (MTU)
Rev. 4.00 Sep. 14, 2005 Page 660 of 982
REJ09B0023-0400
(17) Operation when Error Occurs during Phase Counting Mode Operation, and Operation
is Restarted in Normal Mode
Figure 18.101 shows an explanatory diagram of the case where an error occurs in phase counting
mode and operation is restarted in normal mode after re-setting.
1
RESET
2
TMDR
(PCM)
3
TIOR
(1 init
0 out)
5
TSTR
(1)
4
PFC
(MTU)
6
Match
7
Error
occurs
8
PFC
(PORT)
9
TSTR
(0)
10
TMDR
(normal)
11
TIOR
(1 init
0 out)
12
PFC
(MTU)
13
TSTR
(1)
High-Z
High-Z
MTU module
output
TIOC*A
TIOC*B
Port output
TIOC*A/PTE[n]
TIOC*B/PTE[n]
n = 0 to 15
Figure 18.101 Error Occurrence in Phase Counting Mode, Recovery in Normal Mode
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. Set phase counting mode.
3. Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence.)
4. Set MTU output with the PFC.
5. The count operation is started by TSTR.
6. Output goes low on compare-match occurrence.
7. An error occurs.
8. Set port output with the PFC and output the inverse of the active level.
9. The count operation is stopped by TSTR.
10. Set in normal mode.
11. Initialize the pins with TIOR.
12. Set MTU output with the PFC.
13. Operation is restarted by TSTR.