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Section 3 DSP Operation
Rev. 4.00 Sep. 14, 2005 Page 121 of 982
REJ09B0023-0400
LAB [31:0]
LDB [31:0]
–4, 0, +4, +R8
Pointer (R2, R3, R4, R5)
Any memory areas
Cannot be specified
X0
X1
Y0
Y1
M0
M1
A0G A1G
A0
A1
DSR
Figure 3.16 Single Data-Transfer Operation Flow (Longword)
All data transfer operations are executed in the MA stage of the pipeline.
All data transfer operations do not update any condition code bits in DSR.