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Section 10 Interrupt Controller (INTC)
Rev. 4.00 Sep. 14, 2005 Page 235 of 982
REJ09B0023-0400
10.4.5 Interrupt Exception Handling and Priority
There are three types of interrupt sources: NMI, IRQ, and on-chip peripheral modules. The
priority of each interrupt source is set within level 0 to level 16; level 16 is the highest and level 1
is the lowest. When the priority is set to level 0, that interrupt is masked and the interrupt request
is ignored.
Table 10.5 lists the codes for the interrupt event register (INTEVT2) and the order of interrupt
priority.
Each interrupt source is assigned a unique code by INTEVT2. The start address of the interrupt
service routine is common for each interrupt source. This is why, for instance, the value of
INTEVT2 is used as an offset at the start of the interrupt service routine and branched to in order
to identify the interrupt source.
IRQ interrupt and on-chip peripheral module interrupt priorities can be set freely between 0 and 15
for each module by setting interrupt priority registers A to J (IPRA to IPRJ). A reset assigns
priority level 0 to IRQ and on-chip peripheral module interrupts.
If the same priority level is assigned to two or more interrupt sources and interrupts from those
sources occur simultaneously, their priority order is the default priority order indicated at the right
in table 10.5.