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Section 13 Direct Memory Access Controller (DMAC)
Rev. 4.00 Sep. 14, 2005 Page 420 of 982
REJ09B0023-0400
Table 13.2 Combination of the Round-Robin Select Bits and Priority Mode Bits
Priority Level
Round-robin
Select bit
Transfer
End Priority bit High Low
Mode No. RC0 RC1 RC2 RC3 CH No. PR1 PR0 0 1 2 3
0 0 0 1 1 CH2 1 0 CH0 CH1 CH3 CH2
0 1 1 1 CH1 1 0 CH0 CH2 CH3 CH1 1
0 1 1 1 CH2 1 0 CH0 CH3 CH1 CH2
2 1 1 0 0 CH0 1 0 CH1 CH0 CH2 CH3
1 1 1 0 CH0 1 0 CH1 CH2 CH0 CH3 3
1 1 1 0 CH1 1 0 CH2 CH0 CH1 CH3
1 1 1 1 CH0 1 0 CH1 CH2 CH3 CH0
1 1 1 1 CH1 1 0 CH2 CH3 CH0 CH1
4
1 1 1 1 CH2 1 0 CH3 CH0 CH1 CH2
— Other than the above
setting prohibited
— 1 0 — — — —
* * * * CH0 1 1 CH1 CH2 CH3 CH0
* * * * CH1 1 1 CH2 CH3 CH0 CH1
5
(All-channel
round-robin)
* * * * CH2 1 1 CH3 CH0 CH1 CH2
6 (Fixed mode 2) * * * * * 0 1 CH0 CH2 CH3 CH1
7 (Fixed mode 1) * * * * * 0 0 CH0 CH1 CH2 CH3
Note: * Any