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Section 23 I/O Ports
Rev. 4.00 Sep. 14, 2005 Page 850 of 982
REJ09B0023-0400
23.4.1 Register Description
Port D has the following register.
• Port D data register (PDDR)
23.4.2 Port D Data Register (PDDR)
PDDR is a 16-bit readable/writable register that stores data for pins PTD15 to PTD0. PDDR is
initialized to H'0000 by a power-on reset, after which the general input port function is set as the
initial pin function, and the corresponding pin levels are read when MD3 = 0 (16-bit bus width in
CS0 space) is set. PDDR retains its previous value by a manual reset, in standby mode, or in sleep
mode.
Bit Bit Name
Initial
Value R/W Description
15 PD15DT 0 R/W
14 PD14DT 0 R/W
13 PD13DT 0 R/W
12 PD12DT 0 R/W
11 PD11DT 0 R/W
10 PD10DT 0 R/W
9 PD9DT 0 R/W
8 PD8DT 0 R/W
7 PD7DT 0 R/W
6 PD6DT 0 R/W
5 PD5DT 0 R/W
4 PD4DT 0 R/W
3 PD3DT 0 R/W
2 PD2DT 0 R/W
1 PD1DT 0 R/W
0 PD0DT 0 R/W
Bits PD15DT to PD0DT correspond to pins PTD15 to
PTD0. When the pin function is general output port, the
value of the corresponding bit in PDDR is returned
directly by reading the port. When the function is
general input port, the corresponding pin level is read
by reading the port. Table 23.4 shows the function of
PDDR.