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Section 18 Multi-Function Timer Pulse Unit (MTU)
Rev. 4.00 Sep. 14, 2005 Page 629 of 982
REJ09B0023-0400
18.7.5 Conflict between TCNT Write and Increment Operations
If incrementing occurs in the T2 state of a TCNT write cycle, the TCNT write takes precedence
and TCNT is not incremented.
Figure 18.72 shows the timing in this case.
TCNT input
clock
Write signal
Address
Pφ
TCNT address
TCNT
TCNT write cycle
T1
T2
NM
TCNT write data
Figure 18.72 Conflict between TCNT Write and Increment Operations