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Section 18 Multi-Function Timer Pulse Unit (MTU)
Rev. 4.00 Sep. 14, 2005 Page 526 of 982
REJ09B0023-0400
Table 18.5 TPSC0 to TPSC2 (Channel 0)
Channel
Bit 2
TPSC2
Bit 1
TPSC1
Bit 0
TPSC0
Description
0 0 0 0 Internal clock: counts on Pφ/1
1 Internal clock: counts on Pφ/4
1 0 Internal clock: counts on Pφ/16
1 Internal clock: counts on Pφ/64
1 0 0 External clock: counts on TCLKA pin input
1 External clock: counts on TCLKB pin input
1 0 External clock: counts on TCLKC pin input
1 External clock: counts on TCLKD pin input
Table 18.6 TPSC0 to TPSC2 (Channel 1)
Channel
Bit 2
TPSC2
Bit 1
TPSC1
Bit 0
TPSC0
Description
1 0 0 0 Internal clock: counts on Pφ/1
1 Internal clock: counts on Pφ/4
1 0 Internal clock: counts on Pφ/16
1 Internal clock: counts on Pφ/64
1 0 0 External clock: counts on TCLKA pin input
1 External clock: counts on TCLKB pin input
1 0 Internal clock: counts on Pφ/256
1 Counts on TCNT_2 overflow/underflow
Note: This setting is ignored when channel 1 is in phase counting mode.