Fujitsu FR60 Computer Hardware User Manual


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Chapter 53 Fixed Mode-Reset Vector / BOOT-ROM
3.Registers modified by Boot ROM
3. Registers modified by Boot ROM
The Boot ROM initializes the chip and changes the settings of some registers (see table below).
(Note) The RSRR register can only be read once. After reading the RSRR-register, the contents will be present in
R4 (C-Compiler convention for parameters) after a branch to application start or the address specified by the Boot-
Security-Vector.
3.1 Evaluation Chip MB91V460
(Note) * these registers will only be modified if a check for valid boot condition is performed
3.2 Flash devices of MB91460 series
(Note) * these registers will only be modified if a check for valid boot condition is performed
Register Value Address Description
TBCR 0x03 0x482 Time-Base Counter/Sync-RST Register
RSRR 0 (see note) 0x480 Reset Source Register (visible in R4)
TBR 0x0FFC00 - Table Base Register
SP* 0x0203F8 - Stack Pointer
PFR21* 0x07 0xD95 Port Function Register Port 21 (UART0)
SMR00* 0x05 0x041 UART0 Mode Register
SCR00* 0x17 0x040 UART0 Control Register
SSR00* 0x042 UART0 Serial Status Register
RDR00* 0x043 UART0 Reception Data Register
TRD00* 0x043 UART0 Transmission Data Register
BGR00* 0x0CF 0x080 UART0 Baud Rate/Reload Counter Register
TMCSR0* 0x0003 0x1B6 Reload Timer 0 Control Status Register
TMRLR0* 0x03E8 0x1B0 Reload Timer 0 Reload Register
TMR0* 0x1B2 Reload Timer 0 Timer Register
Register Value Address Description
TBCR 0x03 0x482 Time-Base Counter/Sync-RST Register
RSRR 0 (see note) 0x480 Reset Source Register (visible in R4)
TBR 0x0FFC00 - Table Base Register
SP* - Stack Pointer (depends on RAM size)