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Chapter 11 Memory Controller
1.Overview
Chapter 11 Memory Controller
1. Overview
This module combines the interfaces to the F-Bus memory resources, FLASH and General Purpose RAM (also ref-
erenced as I/D-RAM). These memories can be combined CODE and DATA storage. While code fetch is possible
in general via the F-Bus at the FR core, due to performance reasons the code fetch is accellerated by a direct I-Bus
connection in MB91460 series MCUs.
For FLASH access the interface contains an instruction cache and data read buffer. A prefetch mechanism removes
CPU internal code fetch latencies for linear code.
In addition the module includes the definition of the Fixed Mode Vector (FMV) and the Fixed Reset Vector (FRV),
depending on the device mode.
2. FLASH Interface
• Wait timing
• Generation of FLASH control signals ATDIN and EQIN for synchronous access.
(this version supports independent timing configuration of ADTIN, EQIN and Wait)
• Generation of CEX, WEX and OEX
• Handling of 32 or 64 bit read mode and 16 or 32 bit read/write mode for programming
• Support of external SRAM for emulation devices with 1:1 timing transparency (same wait cycles)
• Measures for FLASH macro test and parallel programming support
3. General Purpose RAM
• Zero wait cycle access (code), one wait cycle access (data) to shared code/data memory (up to 64 kByte),
also referenced as I/D-RAM
4. Instruction Cache and Data Buffer
• Up to 16 kByte Instruction cache (4k word entries, one way direct mapped, prefetch miss option)
• Size configuration for the evaluation device (0, 4, 8 and 16 kB)
• 1 or 2 dword (32 or 64 bit) data read buffer (not available on MB91460 series)
5. Prefetch
• Prefetch of consecutive instruction word address to the cache buffer
• Prefetch is canceled in case of prefetch miss (branch or data access), thus it works without any penalties in
the prefetch miss case.
• The FLASH macro needs to support FLASH access cycle cancelation at any point, that means it may not
affect the timing of the next complete access cycle (no special recovery condition required from previous
access cancelation).
6. Fixed Mode and Reset Vectors
• Mode vector address: 0x000ffff8; return 0x06000000 for internal vector mode