32
Chapter 3 MB91460 Series Basic Information
2.I/O Map
0001F8
H
TCDT2 [R/W]
XXXXXXXX XXXXXXXX
res.
TCCS2 [R/W]
00000000
Free Running
Timer 2
(OCU 0-1)
0001FC
H
TCDT3 [R/W]
XXXXXXXX XXXXXXXX
res.
TCCS3 [R/W]
00000000
Free Running
Timer 3
(OCU 2-3)
000200
H
DMACA0 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
DMAC
000204
H
DMACB0 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000208
H
DMACA1 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
00020C
H
DMACB1 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000210
H
DMACA2 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
000214
H
DMACB2 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000218
H
DMACA3 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
00021C
H
DMACB3 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000220
H
DMACA4 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
000224
H
DMACB4 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000228
H
-
00023C
H
reserved
000240
H
DMACR [R/W]
0 - - 00000
reserved
000244
H
-
00024C
H
reserved
000250
H
DMATEST0 [R/W]
XXXXXXXX 00000000 00000000 0000XXXX
DMA Test
(do not use)
000254
H
DMATEST1 [R]
XXXXXXXX XXXXX000 00000000 00000000
Address
Register
Block
+0 +1 +2 +3