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Chapter 31 External Bus
4.Endian and Bus Access
Figure 4-16 Relationship between Internal Register and External Data Bus for Byte Access
■ Data Bus Width
The following shows the relationships between the internal register and external data bus for each data bus width.
● 32-bit bus width
Figure 4-17 Relationship between Internal Register and External Bus Data for 32-bit Bus Width
● 16-bit bus width
Figure 4-18 Relationship between Internal Register and External Bus Data for 16-bit Bus Width
D31
D15
D23
D7
D0
AA
D31
D15
D23
D7
D0
AA
D31
D15
D23
D7
D0
AA
D31
D15
D23
D7
D0
AA
D31
D15
D23
D7
D0
AA
D31
D15
D23
D7
D0
AA
D31
D15
D23
D7
D0
AA
D31
D15
D23
D7
D0
AA
(3) Halfword access (when executing the LDUB/STB instructions)
a) Output address b) Output address c) Output address d) Output address
low-orderdigits "00" low-order digits "01" low-order digits "10" low-order digits "11"
Internal External Internal External Internal External Internal External
register bus register bus register bus register bus
D07
D15
D23
D31
External bus
Internal resistor
AA
BB
CC
DD
Read/Write
DD
CC
BB
AA
D07
D15
D23
D31
D07
D15
D23
D31
D23
D31
"00" "10"
External busInternal register
Output address low-order digits
AA
BB
CC
DD
BB
AA
DD
CC
read/write