559
Chapter 31 External Bus
4.Endian and Bus Access
Big endian mode Little endian mode
32-bit bus
width
(1)
D00
D31D31
AA
WR0
AA
-
-
-
D00
address : "0"
Internal External Control
Reg terminal terminal
(1)
D00
D31D31
AA
WR0
AA
-
-
-
D00
address : "0"
Internal External Control
Reg terminal terminal
BB
BB
(1)
D00
D31D31
WR1
-
-
-
D00
address : "1"
Internal External Control
Reg terminal terminal
BB
BB
(1)
D00
D31D31
WR1
-
-
-
D00
address : "1"
Internal External Control
Reg terminal terminal
CC
CC
(1)
D00
D31D31
WR2
-
-
-
D00
address : "2"
Internal External Control
Reg terminal terminal
CC
CC
(1)
D00
D31D31
WR2
-
-
-
D00
address : "2"
Internal External Control
Reg terminal terminal
DD
DD
(1)
D00
D31D31
WR3
-
-
-
D00
address : "3"
Internal External Control
Reg terminal terminal
DD
DD
(1)
D00
D31D31
WR3
-
-
-
D00
address : "3"
Internal External Control
Reg terminal terminal