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Chapter 26 DMA Controller
2.DMA Controller (DMAC) Registers
memory address.
• When reset: Initialized to 00
B
.
• These bits are readable and writable.
Table 2-3 Settings for the Transfer Types
TYPE Function
00
B
2-cycle transfer (initial value)
01
B
Fly-by: Memory --> I/O transfer
10
B
Fly-by: I/O --> memory transfer
11
B
Setting disabled