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Chapter 40 Pulse Frequency Modulator
1.PFM Overview
■ 16-bit Reload Counter 0 Register Configuration
■ 16-bit Reload Counter 1 Register Configuration
Figure 1-1 16-bit Reload Counter Register Configuration
CSL2
12
CSL1
11
CSL0
10
–
9
MOD1
8Name
–
15
INV
14
–
13Register
P0TMCSR
RELD
4
INTE
3
UF
2
CNTE
1
TRG
0
–
7
–
6
–
5
Register structure
Control status register
15 0
15 0
P0TMR
P0TMRLR
16-bit counter register
16-bit reload register
CSL2
12
CSL1
11
CSL0
10
–
9
MOD1
8Name
–
15
INV
14
–
13Register
P1TMCSR
RELD
4
INTE
3
UF
2
CNTE
1
TRG
0
–
7
–
6
–
5
Register structure
Control status register
15 0
15 0
P1TMR
P1TMRLR
16-bit counter register
16-bit reload register