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Chapter 41 Up/Down Counter
6.Setting
*: For the setting procedure, refer to the section indicated by the number.
*: For the setting procedure, refer to the section indicated by the number.
*: For the setting procedure, refer to the section indicated by the number.
Table 6-3 Required Settings to Run Up/Down Counter in Phase Difference Count Mode (Multiply by 2 or 4)
Setting Setting registers
Setting
procedure*
Set the reload value/compare value. Reload/compare register (UDRC). See 7.16
(Optional)
Set a value to Up/Down Counter
or
Clear the count value of Up/Down Counter.
Reload/compare register (UDRC) See 7.5
Count control register (UDCC) See 7.8
Set a bit length.
Count control register (UDCC)
See 7.1
Set the count mode to phase difference count mode
(Multiply by 2 or 4).
See 7.2
Enable clearing of Up/Down Counter at the time of the
counting following a compare-match.
See 7.6
Enable reloading at the time of underflow. See 7.7
Enable count control (clear/gate) using the ZIN pin.
See
7.9 and 7.10
Activate Up/Down Counter. Count status register (UDCS) See 7.11
Table 6-4 Required Settings for Up/Down Counter Interrupt
Setting Setting registers
Setting
procedure*
Set Up/Down Counter interrupt vectors and Up/Down
Counter interrupt levels.
Refer to “Chapter 24 Interrupt Control
(Page No.311)”.
See 7.17
Set Up/Down Counter interrupts.
Clear interrupt requests.
Enable interrupt requests.
Count control register (UDCC)
Count status register (UDCS)
See 7.19
Table 6-5 Required Settings to Deactivate Up/Down Counter
Setting Setting registers
Setting
procedure*
Deactivate Up/Down Counter
(Controlled through the ZIN pin)
Count control register (UDCC) See 7.10
Deactivate Up/Down Counter. Count status register (UDCS) See 7.11