560
Chapter 31 External Bus
4.Endian and Bus Access
16-bit bus
width
Big endian mode Little endian mode
AA
AA
WR0
address: "0"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
AA
AA
WR0
address: "0"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
BB
BB
WR1
address: "1"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
BB
BB
WR1
address: "1"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
CC
CC
WR0
address: "2"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
CC
CC
WR0
address: "2"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
DD
DD
WR1
address: "3"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
DD
DD
WR1
address: "3"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16