Fujitsu FR60 Computer Hardware User Manual


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Chapter 29 MPU / EDSU
1.Overview
Chapter 29 MPU / EDSU
1. Overview
Memory Protection Unit (MPU) and Embedded Debug Support Unit (EDSU) for MB91460 series.
Remark: The MPU/EDSU module features a clock disable function. For enabling the MPU/EDSU module it
is necessary to set the EDSUEN bit in the CSCFG register. See chapter “CSCFG: Clock Source Configura-
tion Register (Page No.196)” for further information.
The features are scalable in units of ’Comparator Groups’. The number of this Groups can be defined from one to
eight. Features of one Comparator Group are listed below:
A total number of 4 Breakpoints, could be programmed to:
4 Instruction Address Breakpoints
4 Operand Address Breakpoints (programmable on datasize and access type)
2 Operand Address Breakpoints and 2 Instruction Address Breakpoints
2 Operand Address Breakpoints and 2 Data Value Breakpoints
2 Masks possible to assign (reduces the number of breakpoints)
2 Range Functions
Break Trigger programmable on resource interrupts
MPU functionality
User and SuperVisor permission for read/write/execute
Default permissions for the whole MCU address range
Permission definition for two address ranges per Comparator Group
(8 Groups result in 16 MPU Channels)
Can detect DMA accesses on the D-Bus and Resource address regions
Register set is locked in User mode
Dynamic configuration possible, privileged configuration with INT #5 is not interruptible
A permission violation causes an MPUPV trap
Capture register for Instruction Address and Operand Address (for MPU and Operand Break)
Capture information for MPU channel index, DMA flag, Operand Size and Access Type