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Chapter 10 Standby
5.Operation
5.2 Stop mode
■ Entering stop mode
Writing “1” to the stop mode bit (STCR.STOP) changes to stop mode.
The device remains in this mode until an event occurs to wakeup the device from stop mode.
(See “8. Caution (Page No.165)”.)
■ Device state in stop mode
• The overall device halts (internal circuits halt and the internal clock signals halt).
• Circuits that halt during stop mode
All internal circuits except those listed below.
• Circuits that do not halt during stop mode
• Oscillation circuits that are not specified to be halted
• Oscillation circuit for main clock (if not disabled)
• Oscillation circuit for sub clock (if not disabled)
• Main PLL circuit if oscillation circuit for main clock is enabled and PLL circuit is enabled
and main regulator is kept enabled.
• Peripheral functions that are driven directly by the oscillation and which have not been
specified to be halted.
• Real Time Clock (if not disabled) and main or sub clock oscillation is enabled and the
RTC clock source is set to the enabled oscillation
• LCDC (if LCD display enabled for sub-stop mode and subclock selected as the clock
source.)
• Pin states (High impedance or maintain previous state)
• When pin outputs are set to go to high impedance during stop mode
• High impedance output: Pins that are set as general purpose ports and pins that have
been selected for use by peripheral functions.
• When pin outputs are set to maintain their previous states during stop mode
• Maintain previous state: Pins that are set as general purpose ports and pins that have
been selected for use by peripheral functions.
• When set as external interrupts
• Input available state:
Pins set as external interrupt inputs using level detection or edge detection.
(Whether the pin output during stop mode has been set to either high impedance or
maintain previous state.)
■ Recovery and other items
• Any of the following interrupt requests cause the device to go to the oscillation stabilization wait
RUN state and then to change back to RUN mode after the oscillation stabilization time elapses
(return to normal operation).
• External interrupts set to level detection or edge detection and that do not require a specific
clock.
• Real Time Clock interrupt (if operating)
• An INIT pin input or generation of a watchdog reset invokes an initialization reset (INIT) followed
by an operation reset (RST) after the oscillation stabilization time.