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Chapter 11 Memory Controller
8.Explanations of Registers
• BIT[29]: BIRE - Burn-In ROM Enable
The BIRE bit is a reserved bit and should not be used.
• BIT[28]: RDYEG - RDY status hold and qittation register
The RDYEG bit is cleared after reset.
The bit is set after 0->1 transition of FMCS_RDY. The bit shows that the RDY signal of the FLASH is or
was active (compleated auto-algorithm). The RDYEG bit is cleared automatically at read access to ad-
dress 0x7000.
The RDYEG bit is read-only status information.
Remark: The function of this status bit is not guaranteed when running the CPU on frequencies lower
than 1MHz.
• BIT[27]: RDY - FLASH RDY status of auto-algorithm
This bit shows the status of the RDY line of the FLASH macro. RDY is used to signalize the state of the
FLASH macro in case of an auto-algoriythm was started (e.g. sector erase, chip erase). If RDY returns
to ’1’, the auto-algorithm has been completed.
The RDY bit is read-only status information.
Remark: The function of this status bit is not guaranteed when running the CPU on frequencies lower
than 1MHz.
• BIT[26]: RDYI - RDY output force
This bit is reserved for FLASH test. Do not set this bit.
• BIT[25]: RW16 - 16 bit Read/Write enable to FLASH
This bit is cleared after reset. There is a 32 bit read and write access to the FLASH memory enabled by
default.
Setting of the RW16 bit implies switching from 32 bit into 16 bit mode. When it is intended to write data
to the flash memory (or while chip erase or sector erase) then code fetch from the flash memory is not
supported.
0 Disable Burn-In ROM and enable FLASH access at Burn-In ROM address
1 Enable access to the Burn-In ROM (default)
0 Auto algorithm not started or started and not compleated (default)
1 The FLASH auto-algorithm has been completed since last register read access.
0 Inactive (default)
1 Force the RDY output to ’1’
0 32 bit read and write access to FLASH is enabled (default)
1 16 bit read and write access to FLASH is enabled