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Chapter 2 MB91460 Rev.A/Rev.B Overview
2.Features
• 16-bit reload counter
• Includes clock prescaler (f
RES
/2
1
, f
RES
/2
3
, f
RES
/2
5
, f
RES
/2
6
, f
RES
/2
7
)
• Free-run timer : 16 bits x 8 channels
• 16-bit free running counter, signals an interrupt when overflow or match with compare register
• Includes prescaler (f
RES
/2
2
, f
RES
/2
4
, f
RES
/2
5
, f
RES
/2
6
)
• Timer data register has R/W access
• PPG : 16 bit x 16 channels
• 16 bit down counter, cycle and duty setting registers
• Interrupt at triggering, cycle or duty match
• PWM operation and one-shot operation
• Internal prescaler allows f
RES
/2
0
, f
RES
/2
2
, f
RES
/2
4
, f
RES
/2
6
as counter clock
• Can be triggered by software, reload timer or external trigger
• Reload timer 0/1 available as trigger for PPG 0/1/2/3
• Reload timer 2/3 available as trigger for PPG 4/5/6/7
• Reload timer 4/5 available as trigger for PPG 8/9/10/11
• Reload timer 6/7 available as trigger for PPG 12/13/14/15
• External trigger for PPG 0/8 (shared)
• External trigger for PPG 1/9 (shared)
• External trigger for PPG 2/10 (shared)
• External trigger for PPG 3/11 (shared)
• External trigger for PPG 4/12 (shared)
• External trigger for PPG 5/13 (shared)
• External trigger for PPG 6/14 (shared)
• External trigger for PPG 7/15 (shared)
• Input capture : 16 bits x 8 channels
• Rising edge, falling edge or rising & falling edge sensitive
• Free-run timer 0 available as trigger for input capture 0/1
• Free-run timer 1 available as trigger for input capture 2/3
• Free-run timer 4 available as trigger for input capture 4/5
• Free-run timer 5 available as trigger for input capture 6/7
• Output compare : 16 bits x 8 channels
• Signals an interrupt when a match with of 16-bit IO timer occurs
• An output signal can be generated
• Free-run timer 2 available as trigger for output compare 0/1
• Free-run timer 3 available as trigger for output compare 2/3
• Free-run timer 6 available as trigger for output compare 4/5
• Free-run timer 7 available as trigger for output compare 6/7