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Chapter 44 A/D Converter
6.Q & A
The converter A/D is activated on the first instance of any one of these causes selected.
6.7 To activate the A/D converter
• Generating a software trigger
A software trigger is generated using A/D Conversion Software Trigger bits (ADCS.STRT).
• Activating A/D converter with reload timer 7
The reload timers must be setup and activated. For more information, see “Chapter 38 Reload Timer (Page
No.775)” When an underflow of a reload timer causes the reload timer output signal to rise, an activation
trigger is generated.
• Activating A/D converter with an external trigger
Use external trigger input pin ATGX to generate an external trigger.
The external trigger input pin is set using Port Function bits (PFR16.7) and Extra Port Function Register
(EPFR16.7).
6.8 To verify the end of a conversion
There are two ways to verify the end of a conversion, as follows:
• Checking the A/D Conversion End Interrupt Request bits (ADCS.INT)
• Checking the Operation Verification bits (ADCS.BUSY)
6.9 How do I read a conversion value?
The conversion value can be read from Data Buffer register ADCR.
6.10 How do I force an A/D conversion operation to a stop?
Use the Forced Stop bits (ADCS.BUSY)
The operation of the A/D is unaffected by writing “1” to the Forced Stop bit (BUSY).
To specify a software trigger Set “00”.
To specify an external trigger/software trigger Set “01”.
To specify a reload timer/software trigger Set “10”.
To specify an external trigger/reload timer/software trigger Set “11”.
Operation A/D Conversion Software Trigger Bit (STRT)
To generate a software trigger Write “1”.
Operation Setting
To program the ATGX pin as a trigger input
Set PFR16.7 = ‘0’ and DDR16.7 = ‘0’ (port input mode)
Set PFR16.7 = ‘1’ and EPFR16.7 = ‘1’ (function mode)
(INT) Description
If the read value is “0” No A/D conversion end interrupt request
If the read value is “1” A/D conversion end interrupt request
(BUSY) Setting
If the read value is “0” A/D conversion end (stop)
If the read value is “1” A/D conversion in progress
Operation Forced Stop Bit (BUSY)
To force an A/D conversion operation to a stop Write “0”.