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Chapter 30 I/O Ports
3.Port Register Settings
3. Port Register Settings
3.1 General Rules
For all ports, the following rules are valid:
1. All port inputs are disabled by default to avoid transverse current floating before the ports are
configured by software. After configuring each port pin according to its function it is necessary to enable the
port inputs with the global port enable (PORTEN.GPORTEN). See section Port Input Enable on page 457.
2. Each port has a Port Data Register direct read (PDRD) to sample the pin data with CLKP. This register is
read-only.
3. Each port has a Data Direction Register (DDR) to switch the port's input/output direction. After reset, all
ports are input (DDR=0x00).
• Port Input mode (PFR = "0" and DDR = "0")
PDRD read : Reads the sampled pin data.
PDR read : Reads the sampled pin data.
PDR write : Writes the PDR setting value, has no effect on the pin value.
• Port Output mode (PFR = "0" and DDR = "1")
PDRD read : Reads the sampled pin data.
PDR read : Reads the PDR register value.
PDR write : Writes the PDR setting value to the corresponding external pins.
4. On a Read-Modify-Write instruction (bit operations) always the PDR register is read independent of the
Data Direction Register (DDR) settings.
5. Certain ports have a Port Function Register (PFR) and an Extra Port Function Register (EPFR). To enable
the function determined by EPFR=’1’ it is necessary to also set PFR=’1’. On MB91V460 the behaviour of
setting EPFR=’1’ and PFR=’0’ equals the port input/output mode (reserved for future use).
6. Each port has a Port Input Level Register (PILR) to bit-wise select the input level (CMOS-Hysteresis /
Automotive [/ TTL]). The default value depends on the function of the port.
The input level can be set in every device mode. See section Port Input Level Selection on page 498.
7. Certain ports have programmable Pull-Ups/Pull-Downs (50 kOhm) which are enabled bit-wise by their Pull-
Up/Pull-Down Enable Registers (PPER) and Pull-Up/Pull-Down Control Registers (PPCR). See section
Programmable Pull-Up/Pull Down Resistors on page 500.
8. Each port has one or two Port Function Registers: PFR and, if necessary, Extra PFR (EPFR). Together,
they can serve up to 3 resource I/O’s per pin. See section Port Function Register Setup on page 458.
9. Port setup controlled by the MD[2:0] pins and the mode register MODR overwrites the setup in the port
registers. E.g. External Bus Mode overwrites port register setup. The external bus signal output can be
disabled by setting the PFR of the pin to port mode (PFR=’0).
10.Resource input lines are generally connected to the pin and are enabled by setting the appropriate
functionality inside the resource. There are exceptions which are listed in Port Function Register Setup on
page 458.
11.External Interrupt input lines are always connected to the pin and are enabled in the External Interrupt
unit.
12.In STOP mode (STCR:STOP set and STCR:HIZ not set) all pins keep their state (input or output
depending on the configuration before entering the STOP mode) and the input stages and lines are
internally fixed to avoid transverse current. External interrupt input pins are not fixed if the corresponding
pin is selected by using the PFR=’1’ setting and the corresponding external interrupt is enabled with the
ENIR0, resp. ENIR1 registers. Pull-Ups and Pull-Downs are enabled.
13.In STOP-HIZ mode (STCR:STOP and STCR:HIZ set) all pins are switching to input (high impedance state)
and all input stages and lines are internally fixed to avoid floating. External interrupt input pins are not fixed
if the corresponding pin is selected by using the PFR=’1’ setting and the corresponding external interrupt is
enabled with the ENIR0, resp. ENIR1 registers. Pull-Ups and Pull-Downs are disabled.