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Chapter 47 LCD Controller
3.Configuration
3. Configuration
Figure 3-1 Configuration Diagram
Note: For details on ports, refer to “Chapter 30 I/O Ports (Page No.431)” and “Chapter 3 MB91460 Series Basic
Information (Page No.23)”.
Timing
Control Circuit
LCDCMR
Initial value
Setting
----0000
00001111
LCR1
Initial value
Setting
00 00000000
11 11111111
MS1,0 LCR0: bit3,2
1 1/4 duty cycle1
0 1/3 duty cycle1
1 1/2 duty cycle0
0
Deactivate
0
BK LCR0: bit4
0
Display
1
Blank
LCEN LCR0: bit6
1
Enable display in watch mode.
0
Disable display in watch mode.
VSEL LCR0: bit5
1
Connect internal divided resistors.
0
Disconnect internal divided resistors.
Internal
Divided
Resistors
0
1
Peripheral
clock
Sub
clock
Prescaler
VRAM0
VRAM1
VRAM2
VRAM3
VRAM4
VRAM5
VRAM6
VRAM7
VRAM8
VRAM9
VRAM10
VRAM11
VRAM12
VRAM13
VRAM14
VRAM15
SE G32
:
SE G39
PFR31.0
:
PFR31.7
0
1
SEG output
General-purp. port
SE G2 4
:
SE G31
PFR32.0
:
PFR32.7
SE G1 6
:
SE G2 3
PFR33.0
:
PFR33.7
SE G8
:
SE G1 5
PFR34.0
:
PFR34.7
SE G0
:
SE G7
PFR35.0
:
PFR35.7
COM0
:
COM3
PFR30.0
:
PFR30.3
0
1
General-purp. ports
COM output
From port data
register
COM3
COM1
COM2
COM0
SEG0
1
SEG1
SEG30
SEG39
SEG2
From
general-purpose
port register
CSS LCR0: bit7
1
Subclock
0
Main clock
FP1,0
LCR0: bit1,0
F
CLKP
/( 2
16
N)
F
CLKP
/( 2
15
N)
F
CLKP
/( 2
14
N)
F
CLKP
/( 2
13
N)
11
01
10
00
F
CL-SUB
/(2
6
N)
F
CL-SUB
/(2
5
N)
F
CL-SUB
/(2
4
N)
F
CL-SUB
/(2
3
N)
V0
V1
V2
V3
LCD Controller
LCDCMR
:
0
::
::
::
::
:
0
AC Circuit
Control Section
10FP1,0
00
Common Driver Segment Driver
VRAM16
VRAM17
VRAM18
VRAM19