776
Chapter 38 Reload Timer
3.Configuration
Reload timer 2 : PPG4, PPG5
Reload timer 3 : PPG6, PPG7
Reload timer 4 : PPG8, PPG9
Reload timer 5 : PPG10, PPG11
Reload timer 6 : PPG12, PPG13
Reload timer 7 : PPG14, PPG15
• A/D converter activation trigger source (Reload timer 7 : A/D)
3. Configuration
Figure 3-1 Configuration Diagram
CLKP /2
CLKP /2
3
CLKP /2
5
CLKP /2
6
CLKP /2
7
MO D2- 0
0
0
1
10
11
0
0
0
0
0
XX1
TMCSRx: bit9-7
CNTE TMCS Rx:bit1
0
1
TRG TMCS Rx:bit0
0
1
TMRLR0
16 bit reload register
16 bit down counter (=timer)
//
To general-purpose
port input
TIN0/ICU0/P14.0
Clock source
From general-purpose
port output
PFR14.0
0
1
Trigger selection
TMCSR:bit5, bit4
OUTL
0
0
RELD
1
0
11
0
* For external events, see the next chart.
TOT0
0
1
OCU0 output
TOT0 output
To general-purpose
port input
1
From general-purpose
port output
TOT0/OCU0/P15.0
0
INTE TMCS Rx:bit3
0
1
UF TMCS Rx:bit2
0
1
CSL2-0
0
0
1
10
11
0
0
0
0
0
011
CLKP/2
CLKP/2
3
CLKP /2
5
CLKP /2
6
TMCSRx: bit12-10
101CLKP /2
7
001
1
1
Reload Timer 0 (Internal clock count)
Software trigger
External trigger rising edge
External trigger falling edge
External trigger both edges
Disabled
0
1
0
1
0
1
1
0
1
UF
Internal clockCLKP/2
Internal clock
Internal clock
(External event) *
Internal clock
Internal clock
Disabled
1 1 Disabled
0
.
Counter
activation
Stop
Reload/activation/stop
control circuit
Underflow
Reload
Latch,
output
change
Reload
Stop count (disable output)
Enable count
Selector
Selector
Stop
GP Port
Reload Timer Input
No effect
Soft trigger
Trigger (load + counter activation)
"H" square wave during count
"L" square wave during count
"L" toggle output on count start
"H" toggle output on count start
One-shot mode
Reload mode
Timer interrupt
(underflow)
Disable interrupts
Enable interrupts
Underflow not present
Underflow generation
WRITE 0: Flag clear
TIN0
Ch01 -> PPG0-PPG1
EPFR15.0
TMR0