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Chapter 29 MPU / EDSU
4.Registers
• CTC=2: IA range 0 defines execute permissions and OA range 1 defines read/write permissions.
Data value (DT) detection by setting CTC=3 is not possible to use in MPU mode.
Permission configurations exist for read, write and execute for two CPU modes, the super visor mode and the user
mode. Super visor permissions are valid for SV=1 and user permissions are valid for SV=0.
BIT[23]: SRX1 - Super visor Read/eXecute permission register for range 1
Setting valid for CTC == 0 (Instruction address range comparator):
Setting valid for CTC == 1 or CTC == 2 (Operand address range comparator):
BIT[22]: SW1 - Super visor Write permission register for range 1
Setting valid for CTC == 1 or CTC == 2 (Operand address range comparator):
BIT[21]: SRX0 - Super visor Read/eXecute permission register for range 0
Setting valid for CTC == 0 or CTC == 2 (Instruction address range comparator):
Setting valid for CTC == 1 (Operand address range comparator):
BIT[20]: SW1 - Super visor Write permission register for range 0
Setting valid for CTC == 1 (Operand address range comparator):
0 Super visor has no execute permission on address range 1(default)
1 Super visor has execute permission on address range 1
0 Super visor has no read permission on address range 1 (default)
1 Super visor has read permission on address range 1
0 Super visor has no write permission on address range 1 (default)
1 Super visor has write permission on address range 1
0 Super visor has no execute permission on address range 0 (default)
1 Super visor has execute permission on address range 0
0 Super visor has no read permission on address range 0 (default)
1 Super visor has read permission on address range 0
0 Super visor has no write permission on address range 0 (default)
1 Super visor has write permission on address range 0