557
Chapter 31 External Bus
4.Endian and Bus Access
16-bit bus
width
8-bit bus
width
Big endian mode Little endian mode
AA
BB
WR0
WR1
BB
AA
address: "2"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
AA
BB
WR0
WR1
B
A
address: "0"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
CC
DD
WR0
WR1
DD
CC
address: "2"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
CC
DD
WR0
WR1
DD
CC
address: "2"
D00
D31
D31
Internal External Control
Reg terminal terminal
(1)
D16
AA
BB
WR0
BB
AA
address: "0" "1"
D00 D00
D31
D31
Internal External Control
Reg terminal terminal
(1) (2)
D24
AA
BB
WR0
AA
BB
address: "0" "1"
D00 D00
D31
D31
Internal External Control
Reg terminal terminal
(1) (2)
D24
CC
DD
WR0
DD
CC
address: "2" "3"
D00 D00
D31
D31
Internal External Control
Reg terminal terminal
(1) (2)
D24
CC
DD
WR0
CC
DD
address: "2" "3"
D00 D00
D31
D31
Internal External Control
Reg terminal terminal
(1) (2)
D24