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System control processor (CP15) registers
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NS9750 Hardware Reference
Figure 22 shows the format of the FCSE PID register.
Figure 22: Process ID register format
Performing a fast context switch
You can perform a fast context switch by writing to the Process ID register (R13) with
opcode_2 set to 0. The contents of the caches and the TLB do not have to be flushed
after a fast context switch because they still hold address tags. The two instructions
after the FCSE PID has been written have been fetched with the old FCSE PID, as
shown in this code example:
{FCSE PID = 0}
MOV r0, #1:SHL:25 ;Fetched with FCSE PID = 0
MCR p15,0,r0,c13,c0,0 ;Fetched with FCSE PID = 0
A1 ;Fetched with FCSE PID = 0
A2 ;Fetched with FCSE PID = 0
A3 ;Fetched with FCSE PID = 1
A1, A2, and A3 are the three instructions following the fast context switch.
Context ID register
The Context ID register provides a mechanism that allows real-time trace tools to
identify the currently executing process in multi-tasking environments.
Use these instructions to access the Context ID register:
Function Data ARM instruction
Read context ID Context ID
MRC p15,0,Rd,c13,c0,1
Write context ID Context ID
MCR p15,0,Rd,c13,c0,1
31 25 24 0
SBZ
FCSE PID