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USB host block registers
752
NS9750 Hardware Reference
Register bit assignment
Root hub partition registers
The remaining USB host block registers are dedicated to the USB root hub, which is an
integral part of the host controller although it is a functionally separate entity. The
host controller driver emulates USBD accesses to the root hub through a register
interface. The host controller driver maintains many USB-defined hub features that
are not required to be supported in hardware; for example, the hub’s device
configuration, interface, and endpoint descriptors are maintained only in the host
controller driver as well as some status fields of the class descriptor. The host
controller driver also maintains and decodes the root hub’s device address as well as
performs other operations that are better suited to software than hardware.
The root hub register interface maintains similarity of bit organization and operation
to typical hubs that are found in the system. The four registers defined in this section
are each read and written as 32 bits. These registers are written only during
initialization to correspond with system implementation.
The HcRhDescriptor A and HcRhDescriptorB registers should be
implemented to be writeable, regardless of the host controller USB state.
The HcRhStatus register and HcRhPortStatus register must be writeable
during the USB operational state.
Note:
IS denotes an implementation-specific reset value for the related field.
Bits Access Mnemonic Reset Description
D31:12 N/A Reserved N/A N/A
D11:00 R/W LST 0628h LSThreshold
Contains a value that is compared to the FrameRemaining
field before initiating a low speed (LS) transaction. The
transaction is started only if FrameRemaining is greater
than or equal to LSThreshold. The value is calculated by
the host controller driver, with transmission and setup
overhead considerations.
Table 440: HcLsThreshold register