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751
USB Controller Module
HcLsThreshold register
Address: 9010 1044
The HcLSThreshold register contains a value used by the host controller to determine
whether to commit to the transfer of a maximum-of-8-byte LS packet before EOF.
Neither the host controller driver not the host controller is allowed to change this
value.
D13:00 R/W PS 0h PeriodicStart
Determines when is the earliest time the host controller
should start processing the periodic list.
After a hardware reset, the PS field is cleared. The field is
then set by the host controller driver during the host
controller initialization. The value is calculated as
approximately 10% off from the FrameInterval.
A typical value is
3E67h. When FrameRemaining reaches
the value specified, processing the periodic lists will have
priority over control/bulk processing. The host controller
starts processing the interrupt list after completing the
current control or bulk transaction in progress.
Bits Access Mnemonic Reset Description
Table 439: HcPeriodicStart register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved LSThreshold(LST)
Reserved