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Dynamic memory controller
190
NS9750 Hardware Reference
Table 123 shows the outputs from the memory controller and the corresponding
inputs to the 256M SDRAM (16Mx16, pins 13 and 14 used as bank selects).
66 19 7
55 18 6
44 17 5
33 16 4
22 15 3
11 14 2
0 0 13 **
Output address
(
ADDROUT)
Memory device
connections
AHB address to row
address
AHB address to
column address
14 BA1 11 11
13 BA0 10 10
12 12 24 -
11 11 23 -
10 10/AP 22 AP
99 21 -
88 20 9
77 19 8
66 18 7
55 17 6
44 16 5
33 15 4
22 14 3
Table 123: Address mapping for 256M SDRAM (16Mx16, RBC)
Output address
(
ADDROUT)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 122: Address mapping for 128M SDRAM (16Mx8, RBC)