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PCI bus arbiter
438
NS9750 Hardware Reference
PCI Bridge AHB to PCI Memory Address Translate 1 register
Address: A030 0038
The PCI Bridge AHB-to-PCI Memory Address Translate 1 register translates the AHB
addresses sent to the PCI-to-AHB bridge to the appropriate PCI memory addresses.
Register bit assignment
Bits Access Mnemonic Reset Description
D31 Hardwired to
0
Reserved N/A N/A
D30:24 R/W PALT7VAL 0x00 Bits [31:25] of PCI address when AHB address
[27:25] = 111.
D23 Hardwired to
0
Reserved N/A N/A
D22:16 R/W PALT6VAL 0x00 Bits [31:25] of PCI address when AHB address
[27:25] = 110.
D15 Hardwired to
0
Reserved N/A N/A
D14:08 R/W PALT5VAL 0x00 Bits [31:25] of PCI address when AHB address
[27:25] = 101.
D07 Hardwired to
0
Reserved N/A N/A
D06:00 R/W PALT4VAL 0x00 Bits [31:25] of PCI address when AHB address
[27:25] = 100.
Table 274: PCI Bridge AHB-to-PCI Memory Address Translate 1 register
Rsvd
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
PALT7VAL Rsvd
Rsvd Rsvd
PALT6VAL
PALT5VAL PALT4VAL