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System configuration registers
276
NS9750 Hardware Reference
There are 32 additional GPIO pins that are used to create a general purpose, user-
defined ID register (see "Gen ID register" on page 311). These external signals are
registered at powerup.
Read these signals for general purpose status information.
System configuration registers
Table 170 lists the configuration and status registers for the high-speed AHB bus
system. All configuration registers must be accessed as 32-bit words and as single
accesses only. Bursting is not allowed.
gpio[41] gpio[40] gpio[39] gpio[38]
gpio[37] gpio[36] gpio[35] gpio[34]
gpio[33] gpio[32] gpio[31] gpio[30]
gpio[29] gpio[28] gpio[27] gpio[26]
gpio[25] gpio[23] gpio[22] gpio[21]
gpio[18] gpio[16] gpio[15] gpio[14]
gpio[13] gpio[11] gpio[9] gpio[7]
gpio[6] gpio[5] gpio[3] gpio[1]
Offset [31:24] [23:16] [15:8] [7:0]
A090 0000 AHB Arbiter Gen Configuration
A090 0004 BRC0
A090 0008 BRC1
A090 000C BRC2
A090 0010 BRC3
A090 0014–A090 0040 Reserved
A090 0044 Timer 0 Reload Count register
Table 170: System Control module registers