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Serial port control and status registers
656
NS9750 Hardware Reference
D21:20 R/W MODE 00 Serial channel mode
00 UART mode
01 Reserved
10 SPI master mode
11 SPI slave mode
Configures the serial channel to operate in UART or SPI
modes. The MODE field must be set before the CE bit in
Serial Channel B/A/C/D Control Register A is set to 1.
D19 R/W BITORDR 0 Bit ordering
0 Bits are processed LSB first, MSB last
1 Bits are processed MSB first, LSB last
Controls the order in which bits are transmitted and
received in the Serial Shift register.
D18:12 R/W Not used 0 Always write to 0.
D11:06 N/A Reserved N/A N/A
D05 R/W Not used 0 Must be written as 0.
D04:00 N/A Reserved N/A N/A
Bits Access Mnemonic Reset Description
Table 385: Serial Channel B/A/C/D Control Register B