www.digiembedded.com
67
Working with the CPU
Figure 17 shows the modified virtual address format for Rd for the CP15 R7 MCR
operations.
The tag, set, and word fields define the MVA.
For all cache operations, the word field SHOULD BE ZERO.
Figure 17: R7: MVA format
Figure 18 shows the Set/Way format for Rd for the CP15 R7 MCR operations.
A and S are the base-two logarithms of the associativity and the number of
sets.
The set, way, and word files define the format.
For all of the cache operations, word SHOULD BE ZERO.
For example, a 16 KB cache, 4-way set associative, 8-word line results in the
following:
A = log
2
associativity = log
2
4 = 2
S = log
2
NSETS where
NSETS = cache size in bytes/associativity/line length in bytes:
NSETS = 16384/4/32 = 128
Result: S = log
2
128 = 7
Figure 18: R7: Set/Way format
Test and clean operations
Test and clean DCache instruction
The test and clean DCache instruction provides an efficient way to clean the entire
DCache, using a simple loop. The test and clean DCache instruction tests a number of
lines in the DCache to determine whether any of them are dirty. If any dirty lines are
31 0S+4 4
SBZSet(=index) Word
Tag
215S+5
31 0S+4 4
SBZSet(=index) Word
SBZ
215S+5
Way
32-A 31-A