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Static memory controller
152
NS9750 Hardware Reference
Figure 58: Memory banks constructed from 32-bit memory
Figure 59 shows connections for a typical memory system with different data width
memory devices.
32-bit bank consisting of one 32-bit device
BLSOUT[2]_n
DATA[31:0]
OEOUT_n
ADDROUT[20:0]
STCSOUT_n
WEOUT_n
BLSOUT[3]_n
A[20:0]
CE_n
OE_n
WE_n
IO[31:0]
B[3]_n
B[2]_n
B[1]_n
B[0]_n
BLSOUT[1]_n
BLSOUT[0]_n